texlive[59017] Master/texmf-dist: pst-circ (28apr21)
commits+karl at tug.org
commits+karl at tug.org
Wed Apr 28 23:34:20 CEST 2021
Revision: 59017
http://tug.org/svn/texlive?view=revision&revision=59017
Author: karl
Date: 2021-04-28 23:34:20 +0200 (Wed, 28 Apr 2021)
Log Message:
-----------
pst-circ (28apr21)
Modified Paths:
--------------
trunk/Master/texmf-dist/doc/generic/pst-circ/Changes
trunk/Master/texmf-dist/doc/generic/pst-circ/README
trunk/Master/texmf-dist/doc/generic/pst-circ/pst-circ-doc.pdf
trunk/Master/texmf-dist/doc/generic/pst-circ/pst-circ-doc.tex
trunk/Master/texmf-dist/tex/generic/pst-circ/pst-circ.tex
Added Paths:
-----------
trunk/Master/texmf-dist/source/generic/pst-circ/
trunk/Master/texmf-dist/source/generic/pst-circ/Makefile
Modified: trunk/Master/texmf-dist/doc/generic/pst-circ/Changes
===================================================================
--- trunk/Master/texmf-dist/doc/generic/pst-circ/Changes 2021-04-28 17:04:56 UTC (rev 59016)
+++ trunk/Master/texmf-dist/doc/generic/pst-circ/Changes 2021-04-28 21:34:20 UTC (rev 59017)
@@ -1,3 +1,5 @@
+2.18 2021-04-28 Added new transistors: JFET (N and P channels),
+ D-MOSFET (N and P channels), and IGBT
2.17 2020-05-26 fix for colors in xcolor notation
2.16 2019-01-22 fix for arrows in coil-elektor
2.15 2017-11-16 fix bug with TRot=180 for \transistor
Modified: trunk/Master/texmf-dist/doc/generic/pst-circ/README
===================================================================
--- trunk/Master/texmf-dist/doc/generic/pst-circ/README 2021-04-28 17:04:56 UTC (rev 59016)
+++ trunk/Master/texmf-dist/doc/generic/pst-circ/README 2021-04-28 21:34:20 UTC (rev 59017)
@@ -1,3 +1,6 @@
+If you have TeX run by a distribution then you can ignore all the
+follwoing text, because verything is done by your package manager.
+
Save the files pst-circ.sty|tex in a directory, which is part of your
local TeX tree. pst-circ.pro should be saved in ../texmf/dvips/pstricks/
Then do not forget to run texhash to update this tree.
@@ -40,4 +43,9 @@
For another PDF output read the Introduction from
the documentation.
+
+%% This package may be distributed under the terms of the LaTeX Project
+%% Public License, as described in lppl.txt in the base LaTeX distribution.
+%% Either version 1.0 or, at your option, any later version.
+
hvoss at tug.org
\ No newline at end of file
Modified: trunk/Master/texmf-dist/doc/generic/pst-circ/pst-circ-doc.pdf
===================================================================
(Binary files differ)
Modified: trunk/Master/texmf-dist/doc/generic/pst-circ/pst-circ-doc.tex
===================================================================
--- trunk/Master/texmf-dist/doc/generic/pst-circ/pst-circ-doc.tex 2021-04-28 17:04:56 UTC (rev 59016)
+++ trunk/Master/texmf-dist/doc/generic/pst-circ/pst-circ-doc.tex 2021-04-28 21:34:20 UTC (rev 59017)
@@ -203,6 +203,43 @@
\subsection{Macros}
+
+\bigskip
+\subsubsection{Wire}
+
+\xLcs{wire}
+\begin{LTXexample}[width=3.5cm]
+ \begin{pspicture}(3,2)
+ \pnodes(0,1){A}(3,1){B}\wire(A)(B)
+ \pnodes(0,0){A}(3,0){B}\wire[arrows=o-*](A)(B)
+ \end{pspicture}
+\end{LTXexample}
+
+\bigskip
+\subsubsection{Potential}
+
+\xLcs{tension}
+\begin{LTXexample}[width=3.5cm]
+ \begin{pspicture}(3,2)
+ \pnodes(0,1){A}(3,1){B}
+ \tension(A)(B){$u$}
+ \end{pspicture}
+\end{LTXexample}
+
+\bigskip
+\subsubsection{Ground}
+
+\xLcs{ground}
+\begin{LTXexample}[width=3.5cm]
+ \begin{pspicture}(3,2)
+ \pnodes(0.5,1){A}(1,1){B}(2.5,1){C}
+ \ground(A)
+ \ground{135}(B)
+ \ground[linecolor=blue]{180}(C)
+ \end{pspicture}
+\end{LTXexample}
+
+\bigskip
\subsubsection{Dipole macros}
\xLcs{resistor}
\begin{LTXexample}[width=3.5cm]
@@ -470,35 +507,122 @@
\end{pspicture}
\end{LTXexample}
-There are 5 types of transistors included : NPN, PNP, FET, NMOS and PMOS. It's the macro \Lcs{transistortype} that determines which transistor will be drawn.
+\xLcs{Tswitch}
+\begin{LTXexample}[width=5.5cm]
+ \begin{pspicture}(5,2)
+ \pnodes(0,2){A}(5,2){B}(0,0){C}
+ \Tswitch(A)(B)(C){$K$}
+ \end{pspicture}
+\end{LTXexample}
+\xLcs{potentiometer}
+\begin{LTXexample}[width=5.5cm]
+ \begin{pspicture}(3,3)
+ \pnodes(0,1){A}(3,1){B}(3,2.25){C}
+ \potentiometer[labeloffset=0pt](A)(B)(C){$P$}
+ \end{pspicture}
+\end{LTXexample}
+
+\bigskip
+There are many types of transistors included : NPN, PNP, JFET (N and P channels), D-MOSFET (N and P channels), FET (E-MOSFET N and P channels), NMOS, PMOS and IGBT. It's the macro \Lcs{transistortype} (and options \Lcs{FETchanneltype} and \Lcs{DMOSFET}) that determines which transistor will be drawn.
+
\xLcs{transistor}
\begin{LTXexample}[width=5.5cm]
-\begin{pspicture}(3,4)
-\pnodes(0,2){A}(3,1){B}(3,3){C}
-\transistor(A)(B)(C)
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.5cm](A)(B)(C)
\end{pspicture}
\end{LTXexample}
+\xLkeyset{transistortype=PNP}
+\begin{LTXexample}[width=5.5cm]
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.5cm, transistortype=PNP](A)(B)(C)
+\end{pspicture}
+\end{LTXexample}
+
\xLcs{transistorFET}
\begin{LTXexample}[width=5.5cm]
-\begin{pspicture}(3,4)
-\pnodes(0,2){A}(3,1){B}(3,3){C}
-\transistor[basesep=1cm, transistortype=FET](A)(B)(C)
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.35cm, transistortype=FET](A)(B)(C)
\end{pspicture}
\end{LTXexample}
+\xLcs{transistorFET}
+\begin{LTXexample}[width=5.5cm]
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.35cm, transistortype=FET, FETchanneltype=P](A)(B)(C)
+\end{pspicture}
+\end{LTXexample}
+
+\xLcs{transistorFET}
+\begin{LTXexample}[width=5.5cm]
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.35cm, transistortype=FET, DMOSFET=true](A)(B)(C)
+\end{pspicture}
+\end{LTXexample}
+
+\xLcs{transistorFET}
+\begin{LTXexample}[width=5.5cm]
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.35cm, transistortype=FET, FETchanneltype=P, DMOSFET=true](A)(B)(C)
+\end{pspicture}
+\end{LTXexample}
+
\xLcs{transistorNMOS}
\begin{LTXexample}[width=5.5cm]
-\begin{pspicture}(3,4)
-\pnodes(0,2){A}(3,1){B}(3,3){C}
-\transistor[basesep=1cm, transistortype=NMOS, transistorcircle=false](A)(B)(C)
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.35cm, transistortype=NMOS](A)(B)(C)
\end{pspicture}
\end{LTXexample}
+\xLcs{transistorPMOS}
+\begin{LTXexample}[width=5.5cm]
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.35cm, transistortype=PMOS](A)(B)(C)
+\end{pspicture}
+\end{LTXexample}
+
+\xLcs{transistorJFET}
+\begin{LTXexample}[width=5.5cm]
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.35cm, transistortype=JFET](A)(B)(C)
+\end{pspicture}
+\end{LTXexample}
+
+\xLcs{transistorJFET}
+\begin{LTXexample}[width=5.5cm]
+\begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.35cm, transistortype=JFET, FETchanneltype=P](A)(B)(C)
+\end{pspicture}
+\end{LTXexample}
+
+\xLcs{transistorIGBT}
+\begin{LTXexample}[width=5.5cm]
+ \begin{pspicture}(0,0)(2,2)
+ \pnodes(0,1){A}(1,0){B}(1,2){C}
+ \transistor[basesep=0.35cm, transistortype=IGBT](A)(B)(C)
+ \end{pspicture}
+\end{LTXexample}
+
+
+
+
+
+
+
\xLcs{transistor}\xLkeyword{TRot}
\begin{LTXexample}[width=5.5cm]
-\begin{pspicture}[showgrid](3,4)
+\begin{pspicture}[showgrid](3,3.5)
\pnodes(3,2){A}(0,1){B}(0,3){C}
\transistor[TRot=180](A)(B)(C)
\end{pspicture}
@@ -519,14 +643,6 @@
\end{pspicture}
\end{LTXexample}
-\xLkeyset{transistortype=PNP}
-\begin{LTXexample}[width=5.5cm]
-\begin{pspicture}(3,4)
-\pnodes(0,2){A}(3,1){B}(3,3){C}
-\transistor[transistortype=PNP](A)(B)(C)
-\end{pspicture}
-\end{LTXexample}
-
\xLkeyword{basesep}\xLkeyword{arrows}
\begin{LTXexample}[width=5.5cm]
\begin{pspicture}(5,3)
@@ -547,11 +663,11 @@
\xLkeyword{basesep}\xLkeyword{transistorinvert}
\begin{LTXexample}[width=5.5cm]
-\begin{pspicture}(3,4)
+\begin{pspicture}(3,3.5)
\pnode(0,2){A}\pnode(3,1){B}
\pnode(3,3){C}
\transistor[transistorinvert,
- basesep=1cm](A)(B)(C)
+ basesep=1cm,transistorcircle=false](A)(B)(C)
\end{pspicture}
\end{LTXexample}
@@ -568,61 +684,15 @@
\end{pspicture}
\end{LTXexample}
-\xLcs{Tswitch}
-\begin{LTXexample}[width=5.5cm]
-\begin{pspicture}(5,2)
- \pnodes(0,2){A}(5,2){B}(0,0){C}
- \Tswitch(A)(B)(C){$K$}
-\end{pspicture}
-\end{LTXexample}
-\xLcs{potentiometer}
-\begin{LTXexample}[width=5.5cm]
-\begin{pspicture}(3,3)
- \pnodes(0,1){A}(3,1){B}(3,2.25){C}
- \potentiometer[labeloffset=0pt](A)(B)(C){$P$}
-\end{pspicture}
-\end{LTXexample}
-\xLcs{transistorFET}
-\begin{LTXexample}[width=5.5cm]
-\begin{pspicture}(3,4)
-\pnodes(0,2){A}(3,1){B}(3,3){C}
-\transistor[basesep=1cm, transistortype=FET, FETchanneltype=P](A)(B)(C)
-\end{pspicture}
-\end{LTXexample}
-\begin{LTXexample}[pos=b]
-\psset{mathlabel}
-\def\pcTran(#1)(#2){\psline(#1)(#2|#1)(#2)}% only 2 segements
-\psset{circedge=\pcTran,connectingdot=false}
-\begin{pspicture}(10,10)
-\pnodes(1,1){G1}(6,1){G2}(7.5,1){G3}
-\newground[arrows=o](G1)\newground(G2)\newground(G3)
-\pnodes(1,3){D1u}(7,3){T1B}(0,3){IB}(4,4){T2B}
-\newdiode(G1)(D1u){D1}\qdisk(D1u){2pt}
-\transistor[TRot=270,arrows=-o](T2B)(IB)(T1B)
-\pnode(8,7){O1}%junction to out
-\transistor(T1B)(G3)(O1)
-\pnodes(1,6){D2u}(1,4){G4}
-\newground(G4)
-\newdiode(G4)(D2u){D2}\qdisk(D2u){2pt}
-\pnodes(2.5,7){T4B}(0,6){IA}(5.5,5){T3B}(6,7){R3d}
-\transistor[TRot=270,arrows=-o](T4B)(IA)(T3B)\uput[90](IA){$\mathtt{A}$}
-\transistor(T3B)(G2)(R3d)\uput[90](IB){$\mathtt{B}$}
-\pnodes(2.5,10){VCC1}(4,10){VCC2}(6,10){VCC3}
-\resistor[arrows=o-](VCC1)(T4B){4{,}7k\Omega}
-\resistor[arrows=o-](VCC2)(T2B){4{,}7k\Omega}
-\resistor[arrows=o-](VCC3)(R3d){100\Omega}
-\wire[arrows=*-o](R3d)(O1)
-\uput[90](O1){$\mathtt{OUT}$} \qdisk(7.5,7){2pt}
-\end{pspicture}
-\end{LTXexample}
+
\clearpage
\subsubsection{Quadrupole macros}
@@ -708,42 +778,9 @@
restore original values. We recommand not using it.
-\bigskip
-\subsubsection{Wire}
-\xLcs{wire}
-\begin{LTXexample}[width=3.5cm]
-\begin{pspicture}(3,2)
- \pnodes(0,1){A}(3,1){B}\wire(A)(B)
- \pnodes(0,0){A}(3,0){B}\wire[arrows=o-*](A)(B)
-\end{pspicture}
-\end{LTXexample}
\bigskip
-\subsubsection{Potential}
-
-\xLcs{tension}
-\begin{LTXexample}[width=3.5cm]
-\begin{pspicture}(3,2)
- \pnodes(0,1){A}(3,1){B}
- \tension(A)(B){$u$}
-\end{pspicture}
-\end{LTXexample}
-
-\bigskip
-\subsubsection{ground}
-
-\xLcs{ground}
-\begin{LTXexample}[width=3.5cm]
-\begin{pspicture}(3,2)
- \pnodes(0.5,1){A}(1,1){B}(2.5,1){C}
- \ground(A)
- \ground{135}(B)
- \ground[linecolor=blue]{180}(C)
-\end{pspicture}
-\end{LTXexample}
-
-\bigskip
\subsubsection{Open dipol and open tripol}
\xLcs{OpenDipol}\xLcs{OpenTripol}
@@ -1401,6 +1438,19 @@
\end{pspicture}
\end{LTXexample}
+Variable radius for \xLcs{circledipole}
+\begin{LTXexample}[width=5.5cm]
+ \begin{pspicture}(5,6)
+ \pnodes(0,5){A}(5,5){B}
+ \pnodes(0,3){C}(2.5,3){CD}(5,3){D}
+ \pnodes(0,1){E}(5,1){F}
+ \circledipole(A)(B){}
+ \circledipole[radius=7mm,labeloffset=1cm](C)(D){Strommesser}\rput(CD){\Huge I}
+ \circledipole[radius=4mm,fillstyle=solid,fillcolor=blue!30](E)(F){C}
+ \end{pspicture}
+\end{LTXexample}
+
+
\clearpage
\subsection{Special objects}
@@ -1428,9 +1478,9 @@
\rput[c](4.5,8.85){\sffamily Maxwell}
\pswall{4,8}{5,8.5}{5,8}% top
\pnodes(4.5,8){t}(4.5,4){b}% node definitions
- \resistor[dipolestyle=zigzag,linewidth=0.5pt,labeloffset=1.8](t)(b)% spring
+ \resistor[dipolestyle=zigzag,linewidth=0.5pt,labeloffset=1.9](t)(b)% spring
{\sffamily\small\begin{tabular}{c}\textbf{elasticity}\\(Hookean solid)\end{tabular}}% end spring
- \dashpot[linewidth=0.5pt,labeloffset=1.8](4.5,5)(4.5,3)% dashpot
+ \dashpot[linewidth=0.5pt,labeloffset=2.0](4.5,5)(4.5,3)% dashpot
{\sffamily\small\begin{tabular}{c}\textbf{viscosity}\\(Newtonian fluid)\end{tabular}
}% end dashpot
\psline[arrowscale=3]{->}(4.5,3)(4.5,2)% force
@@ -1440,11 +1490,26 @@
%
% Modified pst-circ Components
%
-\section{Modified default symbols}
+\subsection{Modified default symbols}
-\subsection{Dipole}
+\subsubsection{New ground}
+\xLcs{NewGround}
+\begin{description}
+ \item[\Lkeyword{groundstyle}:] \Lkeyval{ads} | \Lkeyval{old} | \Lkeyval{triangle}
+\end{description}
+\begin{LTXexample}[width=3.5cm,rframe={}]
+ \begin{pspicture}(3,2)
+ \pnodes(0.5,1){A}(1,1){B}(2.5,1){C}
+ \newground(A)
+ \newground[groundstyle=old]{135}(B)
+ \newground[linecolor=blue,groundstyle=triangle]{180}(C)
+ \end{pspicture}
+\end{LTXexample}
+
+%\subsection{Dipole}
+
%
% New Diode
%
@@ -1546,9 +1611,9 @@
\end{pspicture}
\end{LTXexample}
+
\clearpage
-
\section{Examples}
\begin{LTXexample}[pos=t]
@@ -1808,7 +1873,6 @@
The following example was written by Christian Hoffmann.
-
\begin{LTXexample}[pos=t]
\SpecialCoor
\begin{pspicture}(0,-1)(7,6.5)%
@@ -1831,20 +1895,268 @@
\end{pspicture}
\end{LTXexample}
+\begin{LTXexample}[pos=t]
+ \psset{mathlabel}
+ \def\pcTran(#1)(#2){\psline(#1)(#2|#1)(#2)}% only 2 segements
+ \psset{circedge=\pcTran,connectingdot=false}
+
+ \begin{pspicture}(10,10)
+ \pnodes(1,1){G1}(6,1){G2}(7.5,1){G3}
+ \newground[arrows=o](G1)\newground(G2)\newground(G3)
+ \pnodes(1,3){D1u}(7,3){T1B}(0,3){IB}(4,4){T2B}
+ \newdiode(G1)(D1u){D1}\qdisk(D1u){2pt}
+ \transistor[TRot=270,arrows=-o](T2B)(IB)(T1B)
+ \pnode(8,7){O1}%junction to out
+ \transistor(T1B)(G3)(O1)
+ \pnodes(1,6){D2u}(1,4){G4}
+ \newground(G4)
+ \newdiode(G4)(D2u){D2}\qdisk(D2u){2pt}
+ \pnodes(2.5,7){T4B}(0,6){IA}(5.5,5){T3B}(6,7){R3d}
+ \transistor[TRot=270,arrows=-o](T4B)(IA)(T3B)\uput[90](IA){$\mathtt{A}$}
+ \transistor(T3B)(G2)(R3d)\uput[90](IB){$\mathtt{B}$}
+ \pnodes(2.5,10){VCC1}(4,10){VCC2}(6,10){VCC3}
+ \resistor[arrows=o-,labeloffset=0.8](VCC1)(T4B){4{,}7k\Omega}
+ \resistor[arrows=o-,labeloffset=0.8](VCC2)(T2B){4{,}7k\Omega}
+ \resistor[arrows=o-](VCC3)(R3d){100\Omega}
+ \wire[arrows=*-o](R3d)(O1)
+ \uput[90](O1){$\mathtt{OUT}$} \qdisk(7.5,7){2pt}
+ \end{pspicture}
+\end{LTXexample}
-Variable radius for \xLcs{circledipole}
\begin{LTXexample}[pos=t]
-\begin{pspicture}(\linewidth,3)
-\circledipole(0,1)(3,1){} \pnodes(4,1){A}(7,1){B}
-\circledipole[radius=7mm,labeloffset=1cm](A)(B){Strommesser}\rput(5.5,1){\Huge I}
-\circledipole[radius=4mm,fillstyle=solid,fillcolor=blue!30](10,1)(13,1){C}
-\end{pspicture}
+ % Example by Carlos Marcelo de Oliveira Stein
+ \begin{pspicture}(-1.0,-0.2)(15.8,5.8)
+ \pnode(0.5,0.0){A} \pnode(0.5,2.8){B} \pnode(0.5,5.6){C} \pnode(3.0,0.0){D}
+ \pnode(3.0,2.8){E} \pnode(3.0,5.6){F} \pnode(4.8,0.0){G} \pnode(4.8,5.6){H}
+ \pnode(6.6,0.0){I} \pnode(6.6,5.6){J}
+ \vac(B)(E){$V_{in}$}
+ \newdiode(B)(C){$D_1$}
+ \newdiode[ison=false](E)(F){$D_2$}
+ \newdiode[ison=false](A)(B){$D_3$}
+ \newdiode(D)(E){$D_4$}
+ \newcapacitor(G)(H){$C$}
+ \newarmature[labelInside=1](I)(J){}
+ \wire(C)(F) \wire(A)(D) \wire(D)(G) \wire(I)(G) \wire(F)(H) \wire(H)(J)
+ \pscircle*(B){3\pslinewidth} \pscircle*(E){3\pslinewidth} \pscircle*(F){3\pslinewidth}
+ \pscircle*(D){3\pslinewidth} \pscircle*(G){3\pslinewidth} \pscircle*(H){3\pslinewidth}
+
+ \pnode(9.0,0.0){K} \pnode(9.0,2.8){L} \pnode(9.0,5.6){M} \pnode(11.5,0.0){N}
+ \pnode(11.5,2.8){O} \pnode(11.5,5.6){P} \pnode(13.3,0.0){Q} \pnode(13.3,5.6){R}
+ \pnode(15.1,0.0){S} \pnode(15.1,5.6){T}
+ \vac(L)(O){$V_{in}$}
+ \newdiode[ison=false](L)(M){$D_1$}
+ \newdiode(O)(P){$D_2$}
+ \newdiode(K)(L){$D_3$}
+ \newdiode[ison=false](N)(O){$D_4$}
+ \newcapacitor(Q)(R){$C$}
+ \newarmature[labelInside=1](S)(T){}
+ \wire(M)(P) \wire(K)(N) \wire(N)(Q) \wire(S)(Q) \wire(P)(R) \wire(R)(T)
+ \pscircle*(L){3\pslinewidth} \pscircle*(O){3\pslinewidth} \pscircle*(P){3\pslinewidth}
+ \pscircle*(N){3\pslinewidth} \pscircle*(Q){3\pslinewidth} \pscircle*(R){3\pslinewidth}
+ \end{pspicture}
\end{LTXexample}
+\begin{LTXexample}[pos=l]
+ \begin{pspicture}(-1,-1)(4,4)
+ \vac[labeloffset=-0.7](0,0)(4,0){$\backslash$vac}
+ \vac[labeloffset=1](0,0)(2,3.464){$\backslash$vac}
+ \vac[labeloffset=1](2,3.464)(4,0){$\backslash$vac}
+ \end{pspicture}
+\end{LTXexample}
+\begin{landscape}
+
+ \subsubsection{Circuit to harvest Solar Energy}
+ \resizebox{\linewidth}{!}{%
+ \begin{pspicture}[labelangle=:U, showgrid=false](40,10)
+ \pnodes(1.75, 1){A}(3, 1){B}(3, 3.5){C}(4, 3.5){D}(6, 3.5){E}(6, 4.5){F}(3, 5.5){G}(6, 6){H}%
+ (2.5, 6.5){I}(2.5, 8.5){J}(0.5, 6.5){K}(0, 6.5){K1}(8.5, 6){L}(8.5, 5.5){L1}(8.5, 7){M}%
+ (8.5, 9){N}(8.5, 3.5){O}(7.25, 3.5){P}(11, 6){Q}(11, 4){R}(11, 3.5){S}(13, 6){T}%
+ (13, 5){U}(16, 5.5){V}(13, 3.5){W}(13, 1){X}(11.75, 1){X1}(17.5, 3.5){Y}(17.5, 5.5){Z}%
+ (20, 5.5){AA}(20, 6.5){AA1}(20, 5){AA2}(17.5, 9){BB}(22.5, 5.5){CC}(20, 3){DD}(20, 8.5){EE}%
+ (22.5, 3.5){FF}(22.5, 3){FF1}(18.75, 3){GG}(25, 5.5){HH}(25, 4.5){II}(28, 5){JJ}(25, 3){KK}%
+ (25, 0.5){LL}(23.75, 0.5){MM}(27, 3){NN}(29.5, 3){OO}(29.5, 5){PP}(29.5, 8.5){QQ}(31.5, 5){RR}(32.5, 5){SS}
+ %
+ \newground [groundstyle=triangle]{180}(A) \rput(1.75, 2.2){+5}
+ \wire(A)(B)
+ \cell(B)(C){}
+ \wire[linecolor=blue](C)(D)
+ \potentiometer [dipolestyle =zigzag ,labelangle =:U, labeloffset=-0.6, linecolor=blue](D)(E)(F){\textcolor{blue}{$\SI{10}{\kilo\ohm}$}}
+ \wire[arrows=-*, linecolor=blue](E)(F) %$
+ \wire(C)(G)
+ \wire[arrows=-*](F)(H)
+ \OA[OAperfect=false, OAinvert=false](I)(G)(H)
+ \cell(I)(J){}
+ \capacitor[labelangle =0, labeloffset=-0.8](K)(I){$\SI{1}{\micro\farad}$}
+ \wire[arrows=-o](K)(K1)
+ \psarc(0, 6.5){0.15}{90}{-90}
+ \newground(0, 6.35)
+ \newground [groundstyle=triangle]{180}(J)
+ \resistor[arrows=-*, dipolestyle =zigzag ,labelangle =0, labeloffset=0.6](H)(L){$\SI{8.45}{\kilo\ohm}~ 1\%$}
+ \wire(L)(M)
+ \capacitor[labelangle =0, labeloffset=-0.8](M)(N){$\SI{1}{\nano\farad}$}
+ \wire(L)(L1)
+ \resistor[arrows=*-, dipolestyle =zigzag ,labelangle =0, labeloffset=-1.2](O)(L1){$\SI{102}{\kilo\ohm}~ 1\%$}
+ \wire(O)(P)
+ \newground [groundstyle=triangle]{180}(P)
+ \resistor[arrows=-*, dipolestyle =zigzag ,labelangle =0, labeloffset=0.6](L)(Q){$\SI{7.15}{\kilo\ohm}~ 1\%$}
+ \capacitor[labelangle =0, labeloffset=-0.8](R)(Q){$\SI{1}{\nano\farad}$}
+ \wire(O)(S)\wire(S)(R)\wire(Q)(T)
+ \OA[OAperfect=false, OAinvert=false, OApower = true](T)(U)(V)
+ \rput(2.5, 9.7){+5}
+ \rput(7.2, 4.7){+5}
+ \newground [groundstyle=triangle]{180}(14.5, 6)
+ \rput(14.5, 7.2){+12}
+ \newground(14.5, 5)
+ \wire[arrows = -*](U)(W)
+ \cell(X)(W){}
+ \wire(X)(X1)
+ \newground [groundstyle=triangle]{180}(X1)
+ \rput(11.75, 2.3){+5}
+ \wire(W)(15, 3.5)
+ \resistor[dipolestyle =zigzag](15, 3.5)(Y){$\SI{1}{\kilo\ohm}~ 1\%$}
+ \wire[arrows = -*](Y)(Z)
+ \wire(V)(Z)
+ \resistor[dipolestyle =zigzag, arrows =-*](Z)(AA){$\SI{17.4}{\kilo\ohm}~ 1\%$}
+ \wire(N)(BB)
+ \wire(BB)(Z)
+ \resistor[dipolestyle =zigzag, arrows =-*](AA)(CC){$\SI{4.12}{\kilo\ohm}~ 1\%$}
+ \wire(AA)(AA2)
+ \resistor[dipolestyle =zigzag ,labelangle =0, labeloffset=1.1, arrows =-*](AA2)(DD){$\SI{28}{\kilo\ohm}~ 1\%$}
+ \wire(AA)(AA1)
+ \capacitor[labelangle =0, labeloffset=-0.8](AA1)(EE){$\SI{1}{\nano\farad}$}
+ \capacitor[labelangle =0, labeloffset=0.8](CC)(FF){$\SI{1}{\nano\farad}$}
+ \wire(FF)(FF1)
+ \wire(FF1)(GG)
+ \newground [groundstyle=triangle]{180}(GG)
+ \rput(18.75, 4.2){+5}
+ \wire(CC)(HH)
+ \OA[OAperfect=false, OAinvert=false](HH)(II)(JJ)
+ \wire[arrows=-*](II)(KK)
+ \cell(LL)(KK){}
+ \wire(LL)(MM)
+ \newground [groundstyle=triangle]{180}(MM)
+ \rput(23.75, 1.7){+5}
+ \wire(KK)(NN)
+ \resistor[dipolestyle =zigzag](NN)(OO){$\SI{1}{\kilo\ohm}~ 1\%$}
+ \wire(OO)(PP)
+ \wire[arrows = -*](JJ)(PP)
+ \wire(EE)(QQ)
+ \wire(QQ)(PP)
+ \resistor[dipolestyle =zigzag](PP)(RR){$\SI{47}{\kilo\ohm}$}
+ \wire[arrows=-o](RR)(SS)
+ %% OP AMP PINS
+ \rput(3.2, 6.7){\texttt{10}}
+ \rput(3.2, 5.7){\texttt{9}}
+ \rput(5.7, 6.2){\texttt{8}}
+ \rput(13.2, 6.2){\texttt{3}}
+ \rput(13.2, 5.2){\texttt{2}}
+ \rput(15.7, 5.7){\texttt{1}}
+ \rput(14.7, 6.2){\texttt{4}}
+ \rput(14.7, 4.8){\texttt{11}}
+ \rput(25.2, 5.7){\texttt{5}}
+ \rput(25.2, 4.7){\texttt{6}}
+ \rput(27.7, 5.2){\texttt{7}}
+ \end{pspicture}}
+
+ \subsubsection{Amplificator for hearing aid}
+ \scalebox{0.7}{%
+ \begin{pspicture}[showgrid=false](-0.5, -0.5)(25,10)
+ \pnodes(0, 1){A}(-0.1, 2){BC}(0, 2){B}(2, 1.5){C}(6, 1.5){D}(4, 4.5){E}(0, 7.5){F}%
+ (6, 7.5){G}(0, 5){AA}(0, 6){BB}(2, 5.5){CC}(2.5, 5.5){DD}(2.5, 3.5){EE}(6, 5){H}%
+ (7.5, 5){HH}(7.5, 3){HK}(9, 4){I}(9, 5){II}(11.5, 4.5){J}(9, 6.5){K}(11.5, 6.5){KL}%
+ (13, 3.5){L}(15, 4){M}(19, 4){N}(19, 7){O}(13, 7){LL}(13, 8){JJ}(13, 9.5){PP}%
+ (15, 7.5){MM}(15.5, 7.5){NN}(15.5, 6){OO}(19, 9.5){PQ}(17, 6.5){QQ}(19, 7){RR}%
+ (20.5, 7){P}(20.5, 5.5){Q}(22, 7){R}(22, 6){S}(24.5, 6.5){T}(22, 8.5){U}(24.5, 8.5){V}%
+ (25, 6.5){TT}
+ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+ % Première cellule
+
+ \wire[arrows=o-](BC)(B)
+ \GM[GMinvert=false](B)(A)(C)
+ \newground[connectingdot=false, groundstyle=triangle](A)
+ \wire(C)(D)
+ \wire(BB)(F)
+ \wire(F)(G)
+ \wire[arrows=-*](G)(H)
+ \GM[GMinvert=false](BB)(AA)(CC)
+ \newground[connectingdot=false, groundstyle=triangle](AA)
+ \capacitor[arrows=*-, labeloffset=0.9](DD)(EE){$C_{A1}$}
+ \newground[connectingdot=false, groundstyle=triangle](EE)
+
+ \GM[GMinvert=true](CC)(E)(H)
+ \newground[connectingdot=false, groundstyle=triangle](E)
+
+ \wire(D)(H)
+
+ \capacitor[arrows=*-, labeloffset=0.9](HH)(HK){$C_{B1}$}
+ \newground[connectingdot=false, groundstyle=triangle](HK)
+
+ \GM[GMinvert=true](H)(I)(J)
+ \newground[connectingdot=false, groundstyle=triangle](I)
+ \wire[arrows=*-](II)(K)
+ \wire(K)(KL)
+ \wire[arrows=-*](KL)(J)
+ % Seconde cellule
+
+ \GM[GMinvert=false](J)(L)(M)
+ \newground[connectingdot=false, groundstyle=triangle](L)
+ \GM[GMinvert=false](J)(L)(M)
+ \newground[connectingdot=false, groundstyle=triangle](L)
+ \wire(M)(N)
+ \wire(N)(O)
+
+ \GM[GMinvert=false](JJ)(LL)(MM)
+ \newground[connectingdot=false, groundstyle=triangle](LL)
+ \capacitor[arrows=*-, labeloffset=0.9](NN)(OO){$C_{A2}$}
+ \newground[connectingdot=false, groundstyle=triangle](OO)
+ \wire(JJ)(PP)
+ \wire(PP)(PQ)
+ \wire[arrows=-*](PQ)(RR)
+ \GM[GMinvert=false](MM)(QQ)(RR)
+ \newground[connectingdot=false, groundstyle=triangle](QQ)
+
+ \capacitor[arrows=*-, labeloffset=0.9](P)(Q){$C_{B2}$}
+ \newground[connectingdot=false, groundstyle=triangle](Q)
+
+ \GM[GMinvert=false](RR)(S)(T)
+ \newground[connectingdot=false, groundstyle=triangle](S)
+ \wire[arrows=*-](R)(U)
+ \wire(U)(V)
+ \wire[arrows=-*](V)(T)
+ \wire[arrows=-o](T)(TT)
+
+
+
+ %%%%%%%%%%%
+ \rput[B](1, 0.1){$Gm_{5,1}$}
+ \rput[B](1, 4.1){$Gm_{1,1}$}
+ \rput[B](5, 3.6){$Gm_{2,1}$}
+ \rput[B](10.25, 3.1){$Gm_{3,1}$}
+ \rput[B](14, 2.6){$Gm_{5,2}$}
+ \rput[B](14, 6.1){$Gm_{1,2}$}
+ \rput[B](18, 5.6){$Gm_{2,2}$}
+ \rput[B](23.25, 5.1){$Gm_{3,2}$}
+
+ \uput{0.2}[180](BC){\textbf{$V_{IN}$}}
+ \uput{0.2}[0](TT){\textbf{$V_{OUT}$}}
+
+ \end{pspicture}
+ }
+
+\end{landscape}
+
+
+
+
+
+
+\clearpage
+
+
\section{Microwave symbols}
Since for microwave signal, the direction in which the signal spreads is very important,
There are dipoleinput or tripoleinput or quadripoleinput and arrowinput parameters.
@@ -2600,184 +2912,6 @@
\end{tabular}}
\end{pspicture}}
-\subsubsection{Circuit to harvest Solar Energy}
-\resizebox{\linewidth}{!}{%
-\begin{pspicture}[labelangle=:U, showgrid=false](40,10)
- \pnodes(1.75, 1){A}(3, 1){B}(3, 3.5){C}(4, 3.5){D}(6, 3.5){E}(6, 4.5){F}(3, 5.5){G}(6, 6){H}%
- (2.5, 6.5){I}(2.5, 8.5){J}(0.5, 6.5){K}(0, 6.5){K1}(8.5, 6){L}(8.5, 5.5){L1}(8.5, 7){M}%
- (8.5, 9){N}(8.5, 3.5){O}(7.25, 3.5){P}(11, 6){Q}(11, 4){R}(11, 3.5){S}(13, 6){T}%
- (13, 5){U}(16, 5.5){V}(13, 3.5){W}(13, 1){X}(11.75, 1){X1}(17.5, 3.5){Y}(17.5, 5.5){Z}%
- (20, 5.5){AA}(20, 6.5){AA1}(20, 5){AA2}(17.5, 9){BB}(22.5, 5.5){CC}(20, 3){DD}(20, 8.5){EE}%
- (22.5, 3.5){FF}(22.5, 3){FF1}(18.75, 3){GG}(25, 5.5){HH}(25, 4.5){II}(28, 5){JJ}(25, 3){KK}%
- (25, 0.5){LL}(23.75, 0.5){MM}(27, 3){NN}(29.5, 3){OO}(29.5, 5){PP}(29.5, 8.5){QQ}(31.5, 5){RR}(32.5, 5){SS}
-%
- \newground [groundstyle=triangle]{180}(A) \rput(1.75, 2.2){+5}
- \wire(A)(B)
- \cell(B)(C){}
- \wire[linecolor=blue](C)(D)
- \potentiometer [dipolestyle =zigzag ,labelangle =:U, labeloffset=-0.6, linecolor=blue](D)(E)(F){\textcolor{blue}{$\SI{10}{\kilo\ohm}$}}
- \wire[arrows=-*, linecolor=blue](E)(F) %$
- \wire(C)(G)
- \wire[arrows=-*](F)(H)
- \OA[OAperfect=false, OAinvert=false](I)(G)(H)
- \cell(I)(J){}
- \capacitor[labelangle =0, labeloffset=-0.8](K)(I){$\SI{1}{\micro\farad}$}
- \wire[arrows=-o](K)(K1)
- \psarc(0, 6.5){0.15}{90}{-90}
- \newground(0, 6.35)
- \newground [groundstyle=triangle]{180}(J)
- \resistor[arrows=-*, dipolestyle =zigzag ,labelangle =0, labeloffset=0.6](H)(L){$\SI{8.45}{\kilo\ohm}~ 1\%$}
- \wire(L)(M)
- \capacitor[labelangle =0, labeloffset=-0.8](M)(N){$\SI{1}{\nano\farad}$}
- \wire(L)(L1)
- \resistor[arrows=*-, dipolestyle =zigzag ,labelangle =0, labeloffset=-1.2](O)(L1){$\SI{102}{\kilo\ohm}~ 1\%$}
- \wire(O)(P)
- \newground [groundstyle=triangle]{180}(P)
- \resistor[arrows=-*, dipolestyle =zigzag ,labelangle =0, labeloffset=0.6](L)(Q){$\SI{7.15}{\kilo\ohm}~ 1\%$}
- \capacitor[labelangle =0, labeloffset=-0.8](R)(Q){$\SI{1}{\nano\farad}$}
- \wire(O)(S)\wire(S)(R)\wire(Q)(T)
- \OA[OAperfect=false, OAinvert=false, OApower = true](T)(U)(V)
- \rput(2.5, 9.7){+5}
- \rput(7.2, 4.7){+5}
- \newground [groundstyle=triangle]{180}(14.5, 6)
- \rput(14.5, 7.2){+12}
- \newground(14.5, 5)
- \wire[arrows = -*](U)(W)
- \cell(X)(W){}
- \wire(X)(X1)
- \newground [groundstyle=triangle]{180}(X1)
- \rput(11.75, 2.3){+5}
- \wire(W)(15, 3.5)
- \resistor[dipolestyle =zigzag](15, 3.5)(Y){$\SI{1}{\kilo\ohm}~ 1\%$}
- \wire[arrows = -*](Y)(Z)
- \wire(V)(Z)
- \resistor[dipolestyle =zigzag, arrows =-*](Z)(AA){$\SI{17.4}{\kilo\ohm}~ 1\%$}
- \wire(N)(BB)
- \wire(BB)(Z)
- \resistor[dipolestyle =zigzag, arrows =-*](AA)(CC){$\SI{4.12}{\kilo\ohm}~ 1\%$}
- \wire(AA)(AA2)
- \resistor[dipolestyle =zigzag ,labelangle =0, labeloffset=1.1, arrows =-*](AA2)(DD){$\SI{28}{\kilo\ohm}~ 1\%$}
- \wire(AA)(AA1)
- \capacitor[labelangle =0, labeloffset=-0.8](AA1)(EE){$\SI{1}{\nano\farad}$}
- \capacitor[labelangle =0, labeloffset=0.8](CC)(FF){$\SI{1}{\nano\farad}$}
- \wire(FF)(FF1)
- \wire(FF1)(GG)
- \newground [groundstyle=triangle]{180}(GG)
- \rput(18.75, 4.2){+5}
- \wire(CC)(HH)
- \OA[OAperfect=false, OAinvert=false](HH)(II)(JJ)
- \wire[arrows=-*](II)(KK)
- \cell(LL)(KK){}
- \wire(LL)(MM)
- \newground [groundstyle=triangle]{180}(MM)
- \rput(23.75, 1.7){+5}
- \wire(KK)(NN)
- \resistor[dipolestyle =zigzag](NN)(OO){$\SI{1}{\kilo\ohm}~ 1\%$}
- \wire(OO)(PP)
- \wire[arrows = -*](JJ)(PP)
- \wire(EE)(QQ)
- \wire(QQ)(PP)
- \resistor[dipolestyle =zigzag](PP)(RR){$\SI{47}{\kilo\ohm}$}
- \wire[arrows=-o](RR)(SS)
- %% OP AMP PINS
- \rput(3.2, 6.7){\texttt{10}}
- \rput(3.2, 5.7){\texttt{9}}
- \rput(5.7, 6.2){\texttt{8}}
- \rput(13.2, 6.2){\texttt{3}}
- \rput(13.2, 5.2){\texttt{2}}
- \rput(15.7, 5.7){\texttt{1}}
- \rput(14.7, 6.2){\texttt{4}}
- \rput(14.7, 4.8){\texttt{11}}
- \rput(25.2, 5.7){\texttt{5}}
- \rput(25.2, 4.7){\texttt{6}}
- \rput(27.7, 5.2){\texttt{7}}
-\end{pspicture}}
-
-\subsubsection{Amplificator for hearing aid}
-\scalebox{0.7}{%
-\begin{pspicture}[showgrid=false](-0.5, -0.5)(25,10)
- \pnodes(0, 1){A}(-0.1, 2){BC}(0, 2){B}(2, 1.5){C}(6, 1.5){D}(4, 4.5){E}(0, 7.5){F}%
- (6, 7.5){G}(0, 5){AA}(0, 6){BB}(2, 5.5){CC}(2.5, 5.5){DD}(2.5, 3.5){EE}(6, 5){H}%
- (7.5, 5){HH}(7.5, 3){HK}(9, 4){I}(9, 5){II}(11.5, 4.5){J}(9, 6.5){K}(11.5, 6.5){KL}%
- (13, 3.5){L}(15, 4){M}(19, 4){N}(19, 7){O}(13, 7){LL}(13, 8){JJ}(13, 9.5){PP}%
- (15, 7.5){MM}(15.5, 7.5){NN}(15.5, 6){OO}(19, 9.5){PQ}(17, 6.5){QQ}(19, 7){RR}%
- (20.5, 7){P}(20.5, 5.5){Q}(22, 7){R}(22, 6){S}(24.5, 6.5){T}(22, 8.5){U}(24.5, 8.5){V}%
- (25, 6.5){TT}
- %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
- % Première cellule
-
- \wire[arrows=o-](BC)(B)
- \GM[GMinvert=false](B)(A)(C)
- \newground[connectingdot=false, groundstyle=triangle](A)
- \wire(C)(D)
- \wire(BB)(F)
- \wire(F)(G)
- \wire[arrows=-*](G)(H)
- \GM[GMinvert=false](BB)(AA)(CC)
- \newground[connectingdot=false, groundstyle=triangle](AA)
- \capacitor[arrows=*-, labeloffset=0.9](DD)(EE){$C_{A1}$}
- \newground[connectingdot=false, groundstyle=triangle](EE)
-
- \GM[GMinvert=true](CC)(E)(H)
- \newground[connectingdot=false, groundstyle=triangle](E)
-
- \wire(D)(H)
-
- \capacitor[arrows=*-, labeloffset=0.9](HH)(HK){$C_{B1}$}
- \newground[connectingdot=false, groundstyle=triangle](HK)
-
- \GM[GMinvert=true](H)(I)(J)
- \newground[connectingdot=false, groundstyle=triangle](I)
- \wire[arrows=*-](II)(K)
- \wire(K)(KL)
- \wire[arrows=-*](KL)(J)
- % Seconde cellule
-
- \GM[GMinvert=false](J)(L)(M)
- \newground[connectingdot=false, groundstyle=triangle](L)
- \GM[GMinvert=false](J)(L)(M)
- \newground[connectingdot=false, groundstyle=triangle](L)
- \wire(M)(N)
- \wire(N)(O)
-
- \GM[GMinvert=false](JJ)(LL)(MM)
- \newground[connectingdot=false, groundstyle=triangle](LL)
- \capacitor[arrows=*-, labeloffset=0.9](NN)(OO){$C_{A2}$}
- \newground[connectingdot=false, groundstyle=triangle](OO)
- \wire(JJ)(PP)
- \wire(PP)(PQ)
- \wire[arrows=-*](PQ)(RR)
- \GM[GMinvert=false](MM)(QQ)(RR)
- \newground[connectingdot=false, groundstyle=triangle](QQ)
-
- \capacitor[arrows=*-, labeloffset=0.9](P)(Q){$C_{B2}$}
- \newground[connectingdot=false, groundstyle=triangle](Q)
-
- \GM[GMinvert=false](RR)(S)(T)
- \newground[connectingdot=false, groundstyle=triangle](S)
- \wire[arrows=*-](R)(U)
- \wire(U)(V)
- \wire[arrows=-*](V)(T)
- \wire[arrows=-o](T)(TT)
-
-
-
- %%%%%%%%%%%
- \rput[B](1, 0.1){$Gm_{5,1}$}
- \rput[B](1, 4.1){$Gm_{1,1}$}
- \rput[B](5, 3.6){$Gm_{2,1}$}
- \rput[B](10.25, 3.1){$Gm_{3,1}$}
- \rput[B](14, 2.6){$Gm_{5,2}$}
- \rput[B](14, 6.1){$Gm_{1,2}$}
- \rput[B](18, 5.6){$Gm_{2,2}$}
- \rput[B](23.25, 5.1){$Gm_{3,2}$}
-
- \uput{0.2}[180](BC){\textbf{$V_{IN}$}}
- \uput{0.2}[0](TT){\textbf{$V_{OUT}$}}
-
-\end{pspicture}
-}
-
\end{landscape}
@@ -4072,52 +4206,9 @@
\end{LTXexample}
-\clearpage
-\subsection{Examples}
-\begin{LTXexample}[pos=t]
-\begin{pspicture}(0,0)(15,6)
- \pnode(0.5,0){A} \pnode(0.5,2.75){B} \pnode(0.5,5.5){C}
- \pnode(3,0){D} \pnode(3,2.75){E} \pnode(3,5.5){F}
- \pnode(4.75,0){G} \pnode(4.75,5.50){H}
- \pnode(6.5,0){I} \pnode(6.5,5.5){J}
- \vac(B)(E){$V$}
- \newdiode(B)(C){$D_1$}
- \newdiode[ison=false](E)(F){$D_2$}
- \newdiode[ison=false](A)(B){$D_3$}
- \newdiode(D)(E){$D_4$}
- \capacitor(G)(H){$C$}
- \newarmature[labelInside=1](I)(J){}
- \wire(C)(F) \wire(A)(D) \wire(D)(G) \wire(I)(G) \wire(F)(H) \wire(H)(J)
- \pnode(9,0){K} \pnode(9,2.75){L} \pnode(9,5.5){M}
- \pnode(11.5,0){N} \pnode(11.5,2.75){O}
- \pnode(11.5,5.5){P}
- \pnode(13.25,0){Q} \pnode(13.25,5.5){R}
- \pnode(15,0){S} \pnode(15,5.5){T}
- \vac(L)(O){$V$}
- \newdiode[ison=false](L)(M){$D_1$}
- \newdiode(O)(P){$D_2$}
- \newdiode(K)(L){$D_3$}
- \newdiode[ison=false](N)(O){$D_4$}
- \newcapacitor(Q)(R){$C$}
- \newarmature[labelInside=1](S)(T){}
- \wire(M)(P) \wire(K)(N) \wire(N)(Q) \wire(S)(Q) \wire(P)(R) \wire(R)(T)
-\end{pspicture}
-\end{LTXexample}
-
-\begin{LTXexample}[pos=l]
-\begin{pspicture}(-1,-1)(4,4)
- \vac[labeloffset=-0.7](0,0)(4,0){$\backslash$vac}
- \vac[labeloffset=1](0,0)(2,3.464){$\backslash$vac}
- \vac[labeloffset=1](2,3.464)(4,0){$\backslash$vac}
-\end{pspicture}
-\end{LTXexample}
-
-
-
-
\section{Adding new components}
Adding new components is not simple unless you need only a simple dipole. For dipoles a macro is provided that generates all helping macros for a new component so that you need to write only the actual drawing code.
Added: trunk/Master/texmf-dist/source/generic/pst-circ/Makefile
===================================================================
--- trunk/Master/texmf-dist/source/generic/pst-circ/Makefile (rev 0)
+++ trunk/Master/texmf-dist/source/generic/pst-circ/Makefile 2021-04-28 21:34:20 UTC (rev 59017)
@@ -0,0 +1,61 @@
+# `Makefile' for `pst-circ.pdf', hv, 2007/03/17
+
+.SUFFIXES : .tex .ltx .dvi .ps .pdf .eps
+
+PACKAGE = pst-circ
+
+MAIN = $(PACKAGE)-doc
+
+LATEX = latex
+
+ARCHNAME = $(MAIN)-$(shell date +%y%m%d)
+
+ARCHFILES = $(PACKAGE).sty $(PACKAGE).tex $(PACKAGE).pro $(MAIN).tex README Changes Makefile
+
+TDS = ~/PSTricks/PSTricks-TDS
+
+all : doc clean ctan tds
+doc: $(MAIN).pdf
+
+$(MAIN).pdf : $(MAIN).ps
+ GS_OPTIONS=-dAutoRotatePages=/None ps2pdf $<
+
+$(MAIN).ps : $(MAIN).dvi
+ dvips $<
+
+$(MAIN).dvi : $(MAIN).tex
+ $(LATEX) $<
+ $(LATEX) $<
+ if ! test -f $(basename $<).glo ; then touch $(basename $<).glo; fi
+ if ! test -f $(basename $<).idx ; then touch $(basename $<).idx; fi
+ makeindex -s gglo.ist -t $(basename $<).glg -o $(basename $<).gls \
+ $(basename $<).glo
+ makeindex -t $(basename $<).ilg -o $(basename $<).ind \
+ $(basename $<).idx
+ biber $(basename $<)
+ $(LATEX) $<
+ $(LATEX) $<
+
+clean :
+ $(RM) $(addprefix $(MAIN), .log .aux .glg .glo .gls .ilg .idx .ind .tmp .toc .out .blg .Roessler .bbl )
+ $(RM) $(addprefix $(MAIN), .dvi .ps .bcf .run.xml)
+
+veryclean : clean
+ $(RM) $(addprefix $(MAIN), .pdf .bbl .blg)
+
+arch :
+ zip $(ARCHNAME).zip $(ARCHFILES)
+
+ctan:
+ cp *.sty .ctan/$(PACKAGE)/latex/
+ cp $(PACKAGE).tex .ctan/$(PACKAGE)/tex/
+# cp $(PACKAGE)97.tex .ctan/$(PACKAGE)/tex/
+ cp *.pro .ctan/$(PACKAGE)/dvips/
+# cp more_docs/* .ctan/$(PACKAGE)/doc/
+ cp $(PACKAGE)-doc.* .ctan/$(PACKAGE)/doc/
+# rm -fr .ctan/$(PACKAGE)/.svn
+#
+ cp Changes .ctan/$(PACKAGE)/
+ cp README .ctan/$(PACKAGE)/
+ chmod -R a+r .ctan/$(PACKAGE)
+
Property changes on: trunk/Master/texmf-dist/source/generic/pst-circ/Makefile
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Modified: trunk/Master/texmf-dist/tex/generic/pst-circ/pst-circ.tex
===================================================================
--- trunk/Master/texmf-dist/tex/generic/pst-circ/pst-circ.tex 2021-04-28 17:04:56 UTC (rev 59016)
+++ trunk/Master/texmf-dist/tex/generic/pst-circ/pst-circ.tex 2021-04-28 21:34:20 UTC (rev 59017)
@@ -26,8 +26,8 @@
\ifx\PSTXKeyLoaded\endinput \else\input pst-xkey \fi
\ifx\PSTMultidoLoaded\endinput\else\input multido.tex\fi
%
-\def\fileversion{2.17}
-\def\filedate{2020/05/26}
+\def\fileversion{2.18}
+\def\filedate{2021/04/28}
\message{`pst-circ' v\fileversion (hv)}
%
\edef\PstAtCode{\the\catcode`\@}
@@ -57,6 +57,8 @@
\def\pst at Ttype@PNP{PNP}
\def\pst at Ttype@NPN{NPN}
\def\pst at Ttype@FET{FET}
+\def\pst at Ttype@JFET{JFET}
+\def\pst at Ttype@IGBT{IGBT}
\def\pst at Ttype@NMOS{NMOS}
\def\pst at Ttype@PMOS{PMOS}
%
@@ -150,8 +152,13 @@
\define at key[psset]{pst-circ}{transistoriemitterlabel}[]{\def\psk at labeltransistoriemitter{#1}}
\define at key[psset]{pst-circ}{FETchanneltype}{\def\psk at FETchanneltype{#1}}% Ted 2007-10-15
\define at boolkey[psset]{pst-circ}[Pst@]{FETmemory}[true]{}
+\define at boolkey[psset]{pst-circ}[Pst@]{DMOSFET}[false]{}
\define at key[psset]{pst-circ}{transistortype}[NPN]{%
\def\psk at Ttype{#1}%
+ \ifx\psk at Ttype\pst at Ttype@JFET \Pst at transistorcirclefalse\fi
+ \ifx\psk at Ttype\pst at Ttype@NMOS \Pst at transistorcirclefalse\fi
+ \ifx\psk at Ttype\pst at Ttype@PMOS \Pst at transistorcirclefalse\fi
+ \ifx\psk at Ttype\pst at Ttype@IGBT \Pst at transistorcirclefalse\fi
\ifx\psk at Ttype\pst at Ttype@FET \Pst at transistorcirclefalse\fi}
\newdimen\Pst at basesep
\define at key[psset]{pst-circ}{basesep}[0]{\pst at getlength{#1}\Pst at basesep}
@@ -861,6 +868,7 @@
transistoricollectorlabel={},transistoriemitterlabel={},
transistortype=NPN,TRot=0,%
FETmemory=false, % atosch
+ DMOSFET=false, % MOSFET type: D or E
primarylabel={},secondarylabel={},transformeriprimary=false,transformerisecondary=false,
transformeriprimarylabel={},transformerisecondarylabel={},
tripolestyle=normal,variable=false,
@@ -1165,7 +1173,7 @@
%
\def\transistor at ii(#1)#2#3{% with one node, the base
\pst at killglue%
- \ifPst at temp\pnode(#1){TBaseNode}%
+ \ifPst at temp\pnode(#1){TBaseNode}% Base
\else
\pst at getcoor{#1}\pst at tempA%
\pnode(!
@@ -1174,157 +1182,225 @@
/basesep \Pst at basesep\space \pst at number\psxunit div def
XB basesep \Pst at TRot\space cos mul add
YB basesep \Pst at TRot\space sin mul add){TBaseNode}% base node
- \fi
+ \fi % Base
\rput[c]{\Pst at TRot}(!
- \pst at tempA /YB exch \pst at number\psyunit div def
- /XB exch \pst at number\psxunit div def
- /basesep \Pst at basesep\space \pst at number\psxunit div def
- XB basesep \Pst at TRot\space cos mul add
- YB basesep \Pst at TRot\space sin mul add){%
- \ifdim180pt=\Pst at TRot pt\relax
- \ifPst at transistorcircle\pscircle(0.3,0){0.7}\fi
- \ifx\psk at Ttype\pst at Ttype@NPN\relax
- \ifPst at transistorinvert
- \pnode(0.5,-0.5){#2}%
- \pnode(0.5,0.5){#3}%
- \else
- \pnode(0.5,-0.5){#3}%
- \pnode(0.5,0.5){#2}%
- \fi
- \psline[linewidth=4\pslinewidth,arrows=-](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
- \psline[arrowinset=0,arrowsize=8\pslinewidth,arrows=->](#2)(TBaseNode)(#3)%
- \else
- \ifx\psk at Ttype\pst at Ttype@PNP\relax
- \ifPst at transistorinvert
- \pnode(0.5,-0.5){#2}\pnode(0.5,0.5){#3}%
- \else
- \pnode(0.5,-0.5){#3}\pnode(0.5,0.5){#2}%
- \fi
- \psline[linewidth=4\pslinewidth,arrows=-](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
- \psline[arrowinset=0,arrowsize=8\pslinewidth,arrows=->,dimen=middle](0.5,-0.5)(TBaseNode)%
- \psline(0.5,0.5)(TBaseNode)
- \else% FET
- \ifx\psk at Ttype\pst at Ttype@FET\relax%
- \ifPst at transistorinvert\pnode(0.75,-0.5){#2}\else\pnode(0.75,-0.5){#3}\fi%
- \ifPst at transistorinvert\pnode(0.75,0.5){#3}\else\pnode(0.75,0.5){#2}\fi%
- % Main drawings
- \psline[arrows=-](0.75,0.5)(0.2,0.5)
- \psline[linestyle=dashed,dash=8pt 3pt,arrows=-](0.2,0.6)(0.2,-0.6)
- \psline[arrows=-](0.2,-0.5)(0.75,-0.5)%
- \ifPst at FETmemory% atosch
- \psline[arrows=-,linewidth=\psk at I@width](-0.15,0.5)(-0.15,-0.5)%
- \fi%
- \psline[arrows=-,linewidth=\psk at I@width](TBaseNode|0,0.5)(TBaseNode|0,-0.5)%
- \ifx\psk at FETchanneltype\pst at FETchanneltype@P\relax% Ted 2007-10-15
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.2,0)(0.75,0)%
- \ifPst at transistorinvert
- \qdisk(#3){1.5pt}\psline[origin={#3}]{-}(0,-0.5)%
- \else
- \qdisk(#3){1.5pt}\psline[origin={#3}]{-}(0,0.5)%
- \fi
- \else%
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.2,0)(0.75,0)%
- \ifPst at transistorinvert
- \qdisk(#2){1.5pt}\psline[origin={#2}]{-}(0,0.5)%
- \else
- \qdisk(#2){1.5pt}\psline[origin={#2}]{-}(0,-0.5)%
- \fi
- \fi%
- \else % NMOS or PMOS
- \ifPst at transistorinvert\pnode(0.75,-0.4){#2}\else\pnode(0.75,-0.4){#3}\fi%
- \ifPst at transistorinvert\pnode(0.75,0.4){#3}\else\pnode(0.75,0.4){#2}\fi%
- % Main drawings
- \psline[arrows=-](0.75,0.4)(0.15,0.4)
- \psline[linewidth=3\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6)
- \psline[arrows=-](0.75,-0.4)(0.15,-0.4)%
- \ifx\psk at Ttype\pst at Ttype@NMOS\relax%
- \ifPst at transistorinvert
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,0.4)(0.75,0.4)%
- \else
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,-0.4)(0.75,-0.4)%
- \fi
- \psline[arrows=-,linewidth=1.5\psk at I@width](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \pst at tempA /YB exch \pst at number\psyunit div def
+ /XB exch \pst at number\psxunit div def
+ /basesep \Pst at basesep\space \pst at number\psxunit div def
+ XB basesep \Pst at TRot\space cos mul add
+ YB basesep \Pst at TRot\space sin mul add){%
+ \ifdim180pt=\Pst at TRot pt\relax % rotate 180?
+ \ifPst at transistorcircle\pscircle(0.3,0){0.7}\fi % circle drawing
+ \ifx\psk at Ttype\pst at Ttype@NPN\relax % NPN
+ \ifPst at transistorinvert
+ \pnode(0.5,-0.5){#2}% Emitter
+ \pnode(0.5,0.5){#3}% Collector
+ \else
+ \pnode(0.5,-0.5){#3}% Collector
+ \pnode(0.5,0.5){#2}% Emitter
+ \fi % no NPN
+ \psline[linewidth=4\pslinewidth,arrows=-](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \psline[arrowinset=0,arrowsize=8\pslinewidth,arrows=->](#2)(TBaseNode)(#3)%
+ \else % not NPN
+ \ifx\psk at Ttype\pst at Ttype@PNP\relax % PNP
+ \ifPst at transistorinvert
+ \pnode(0.5,-0.5){#2}\pnode(0.5,0.5){#3}% E C
\else
- \ifPst at transistorinvert
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,0.4)(0.75,0.4)%
+ \pnode(0.5,-0.5){#3}\pnode(0.5,0.5){#2}% C E
+ \fi
+ \psline[linewidth=4\pslinewidth,arrows=-](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \psline[arrowinset=0,arrowsize=8\pslinewidth,arrows=->,dimen=middle](0.5,-0.5)(TBaseNode)%
+ \psline(0.5,0.5)(TBaseNode)
+ \else % not PNP
+ \ifx\psk at Ttype\pst at Ttype@FET\relax% FET
+ \ifPst at transistorinvert\pnode(0.75,-0.5){#2}\else\pnode(0.75,-0.5){#3}\fi%
+ \ifPst at transistorinvert\pnode(0.75,0.5){#3}\else\pnode(0.75,0.5){#2}\fi%
+ % Main drawings
+ \psline[arrows=-](0.75,0.5)(0.2,0.5)
+ \ifPst at DMOSFET% MOSFET type: D or E
+ \psline[linewidth=\psk at I@width,arrows=-](0.2,0.6)(0.2,-0.6)
+ \else
+ \psline[linestyle=dashed,dash=8pt 3pt,arrows=-](0.2,0.6)(0.2,-0.6)
+ \fi % MOSFET type: D or E
+ \psline[arrows=-](0.2,-0.5)(0.75,-0.5)%
+ \ifPst at FETmemory% atosch
+ \psline[arrows=-,linewidth=\psk at I@width](-0.15,0.5)(-0.15,-0.5)%
+ \fi%
+ \psline[arrows=-,linewidth=\psk at I@width](TBaseNode|0,0.5)(TBaseNode|0,-0.5)%
+ \ifx\psk at FETchanneltype\pst at FETchanneltype@P\relax% Ted 2007-10-15
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.2,0)(0.75,0)%
+ \ifPst at transistorinvert
+ \qdisk(#3){1.5pt}\psline[origin={#3}]{-}(0,-0.5)%
+ \else
+ \qdisk(#3){1.5pt}\psline[origin={#3}]{-}(0,0.5)%
+ \fi
+ \else%
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.2,0)(0.75,0)%
+ \ifPst at transistorinvert
+ \qdisk(#2){1.5pt}\psline[origin={#2}]{-}(0,0.5)%
+ \else
+ \qdisk(#2){1.5pt}\psline[origin={#2}]{-}(0,-0.5)%
+ \fi
+ \fi%
+ \else % JFET, NMOS or PMOS
+ \ifx\psk at Ttype\pst at Ttype@JFET\relax% JFET
+ % JFET Main drawings
+ \psline[arrows=-](0.65,0.4)(0.15,0.4) % upper line
+ \psline[arrows=-](0.65,-0.4)(0.15,-0.4)% lower line
+ \psline[arrows=-,linewidth=3\psk at I@width](0.15,0.6)(0.15,-0.6)% gate
+ \ifPst at transistorinvert\pnode(0.65,-0.4){#2}\else\pnode(0.65,-0.4){#3}\fi%
+ \ifPst at transistorinvert\pnode(0.65,0.4){#3}\else\pnode(0.65,0.4){#2}\fi%
+ \ifx\psk at FETchanneltype\pst at FETchanneltype@P
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,0.0)(-0.35,0.0)%
+ \else
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(-0.35,0.0)(0.15,0.0)%
+ \fi
+ \else % IGBT, NMOS or PMOS
+ \ifx\psk at Ttype\pst at Ttype@IGBT\relax% IGBT
+ % IGBT Main drawings
+ \ifPst at transistorinvert
+ \pnode(0.65,-0.5){#2}\pnode(0.65,0.5){#3}
+ \pnode(0.15,0.12){#3c}\pnode(0.15,-0.12){#2c}
+ \else
+ \pnode(0.65,-0.5){#3}\pnode(0.65,0.5){#2}
+ \pnode(0.15,-0.12){#3c}\pnode(0.15,0.12){#2c}
+ \fi%
+ \psline[linewidth=\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6)
+ \psline[arrows=-,linewidth=\psk at I@width](TBaseNode|0,0.5)(TBaseNode|0,-0.5)%
+ \psline[arrows=-](#3)(#3c)%
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(#2c)(#2)%
+ \else % NMOS or PMOS
+ \ifPst at transistorinvert\pnode(0.75,-0.4){#2}\else\pnode(0.75,-0.4){#3}\fi%
+ \ifPst at transistorinvert\pnode(0.75,0.4){#3}\else\pnode(0.75,0.4){#2}\fi%
+ % Main drawings
+ \psline[arrows=-](0.75,0.4)(0.15,0.4)
+ \psline[linewidth=3\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6)
+ \psline[arrows=-](0.75,-0.4)(0.15,-0.4)%
+ \ifx\psk at Ttype\pst at Ttype@NMOS\relax% NMOS?
+ \ifPst at transistorinvert
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,0.4)(0.75,0.4)%
+ \else
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,-0.4)(0.75,-0.4)%
+ \fi
+ \psline[arrows=-,linewidth=1.5\psk at I@width](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \else % PMOS
+ \ifPst at transistorinvert
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,0.4)(0.75,0.4)%
+ \else
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,-0.4)(0.75,-0.4)%
+ \fi
+ \psline[arrows=-,linewidth=1.5\psk at I@width](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \fi
+ \fi % NMOS or PMOS
+ \fi % IGBT, NMOS or PMOS
+ \fi % JFET, NMOS or PMOS
+ \fi % PNP
+ \fi% NPN
+ \else % not 180
+ \ifPst at transistorcircle\pscircle(0.3,0){0.7}\fi
+ \ifx\psk at Ttype\pst at Ttype@FET\relax% FET
+ \ifPst at transistorinvert\pnode(0.65,0.5){#2}\else\pnode(0.65,0.5){#3}\fi%
+ \ifPst at transistorinvert\pnode(0.65,-0.5){#3}\else\pnode(0.65,-0.5){#2}\fi%
+ % FET Main drawings
+ \psline[arrows=-](0.65,0.5)(0.15,0.5) % upper line
+ \ifPst at DMOSFET% MOSFET type: D or E
+ \psline[linewidth=\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6)
+ \else
+ \psline[linestyle=dashed,dash=8pt 3pt,arrows=-](0.15,0.6)(0.15,-0.6)
+ \fi %
+ \psline[arrows=-](0.15,-0.5)(0.65,-0.5)% lower line
+ \ifPst at FETmemory% atosch
+ \psline[arrows=-,linewidth=\psk at I@width](-0.15,0.5)(-0.15,-0.5)%
+ \fi%
+ \psline[arrows=-,linewidth=\psk at I@width](TBaseNode|0,0.5)(TBaseNode|0,-0.5)%
+ \ifx\psk at FETchanneltype\pst at FETchanneltype@P\relax% Ted 2007-10-15
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,0)(0.65,0)%
+ \qdisk(#3){1.5pt}\psline{-}(#3)(0.65,0.0)%
+ \else%
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,0)(0.65,0)%
+ \qdisk(#2){1.5pt}\psline{-}(#2)(0.65,0.0)%
+ \fi%
+ \else % not FET
+ \ifx\psk at Ttype\pst at Ttype@NMOS\relax% NMOS
+ % NMOS Main drawings
+ \psline[arrows=-](0.65,0.4)(0.15,0.4) % upper line
+ \psline[linewidth=3\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6) % gate
+ \psline[arrows=-](0.65,-0.4)(0.15,-0.4)% lower line
+ \psline[arrows=-,linewidth=1.5\psk at I@width](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \ifPst at transistorinvert\pnode(0.65,0.4){#2}\else\pnode(0.65,0.4){#3}\fi%
+ \ifPst at transistorinvert\pnode(0.65,-0.4){#3}\else\pnode(0.65,-0.4){#2}\fi%
+ \ifPst at transistorinvert
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,0.4)(0.65,0.4)%
+ \else
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,-0.4)(0.65,-0.4)%
+ \fi
+ \else % not NMOS
+ \ifx\psk at Ttype\pst at Ttype@PMOS\relax% PMOS
+ % PMOS Main drawings
+ \psline[arrows=-](0.65,0.4)(0.15,0.4) % upper line
+ \psline[linewidth=3\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6) % gate
+ \psline[arrows=-](0.65,-0.4)(0.15,-0.4)% lower line
+ \psline[arrows=-,linewidth=1.5\psk at I@width](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \ifPst at transistorinvert
+ \pnode(0.65,0.4){#2}\pnode(0.65,-0.4){#3}
+ \else
+ \pnode(0.65,0.4){#3}\pnode(0.65,-0.4){#2}
+ \fi%
+ \ifPst at transistorinvert
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,0.4)(0.65,0.4)%
\else
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,-0.4)(0.75,-0.4)%
- \fi
- \psline[arrows=-,linewidth=1.5\psk at I@width](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
- \fi
- \fi
- \fi %
- \fi%
- \else%
- \ifPst at transistorcircle\pscircle(0.3,0){0.7}\fi
- \ifx\psk at Ttype\pst at Ttype@FET\relax%
- \ifPst at transistorinvert\pnode(0.65,0.5){#2}\else\pnode(0.65,0.5){#3}\fi%
- \ifPst at transistorinvert\pnode(0.65,-0.5){#3}\else\pnode(0.65,-0.5){#2}\fi%
- % FET Main drawings
- \psline[arrows=-](0.65,0.5)(0.15,0.5) % upper line
- \psline[linestyle=dashed,dash=8pt 3pt,arrows=-](0.15,0.6)(0.15,-0.6) % gate
- \psline[arrows=-](0.15,-0.5)(0.65,-0.5)% lower line
- \ifPst at FETmemory% atosch
- \psline[arrows=-,linewidth=\psk at I@width](-0.15,0.5)(-0.15,-0.5)%
- \fi%
- \psline[arrows=-,linewidth=\psk at I@width](TBaseNode|0,0.5)(TBaseNode|0,-0.5)%
- \ifx\psk at FETchanneltype\pst at FETchanneltype@P\relax% Ted 2007-10-15
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,0)(0.65,0)%
- \qdisk(#3){1.5pt}\psline[origin={#3}]{-}(0,-0.5)%
- \else%
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,0)(0.65,0)%
- \qdisk(#2){1.5pt}\psline[origin={#2}]{-}(0,0.5)%
- \fi%
- \else
- \ifx\psk at Ttype\pst at Ttype@NMOS\relax%
- % NMOS Main drawings
- \psline[arrows=-](0.65,0.4)(0.15,0.4) % upper line
- \psline[linewidth=3\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6) % gate
- \psline[arrows=-](0.65,-0.4)(0.15,-0.4)% lower line
- \psline[arrows=-,linewidth=1.5\psk at I@width](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
- \ifPst at transistorinvert\pnode(0.65,0.4){#2}\else\pnode(0.65,0.4){#3}\fi%
- \ifPst at transistorinvert\pnode(0.65,-0.4){#3}\else\pnode(0.65,-0.4){#2}\fi%
- \ifPst at transistorinvert
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,0.4)(0.65,0.4)%
- \else
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,-0.4)(0.65,-0.4)%
- \fi
- \else
- \ifx\psk at Ttype\pst at Ttype@PMOS\relax%
- % PMOS Main drawings
- \psline[arrows=-](0.65,0.4)(0.15,0.4) % upper line
- \psline[linewidth=3\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6) % gate
- \psline[arrows=-](0.65,-0.4)(0.15,-0.4)% lower line
- \psline[arrows=-,linewidth=1.5\psk at I@width](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
- \ifPst at transistorinvert
- \pnode(0.65,0.4){#2}\pnode(0.65,-0.4){#3}
- \else
- \pnode(0.65,0.4){#3}\pnode(0.65,-0.4){#2}
- \fi%
- \ifPst at transistorinvert
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,0.4)(0.65,0.4)%
- \else
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,-0.4)(0.65,-0.4)%
- \fi
- \else % PNP or NPN
- \ifPst at transistorinvert
- \pnode(0.5,0.5){#2}\pnode(0.5,-0.5){#3}%
- \else
- \pnode(0.5,0.5){#3}\pnode(0.5,-0.5){#2}%
- \fi
- \ifx\psk at Ttype\pst at Ttype@NPN\relax% % NPN
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(TBaseNode)(#2)%
- \psline[arrows=-,linewidth=4\pslinewidth](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
- \psline[arrows=-](0.5,0.5)(TBaseNode)(0.5,-0.5)%
- \else% % PNP
- \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(#3)(TBaseNode)%
- \psline[arrows=-,linewidth=4\pslinewidth](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
- \psline[arrows=-](0.5,0.5)(TBaseNode)(0.5,-0.5)%
- \fi
- \fi
- \fi
- \fi
- \fi
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{<-}(0.15,-0.4)(0.65,-0.4)%
+ \fi
+ \else % not NMOS -> JFET, IGBT, PNP or NPN
+ \ifx\psk at Ttype\pst at Ttype@JFET\relax% JFET
+ % JFET Main drawings
+ \psline[arrows=-](0.65,0.4)(0.15,0.4) % upper line
+ %\psline[linewidth=3\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6) % gate large
+ \psline[arrows=-](0.65,-0.4)(0.15,-0.4)% lower line
+ %\psline[arrows=-,linewidth=1.5\psk at I@width](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \psline[arrows=-,linewidth=3\psk at I@width](0.15,0.6)(0.15,-0.6)% gate
+ \ifPst at transistorinvert\pnode(0.65,0.4){#2}\else\pnode(0.65,0.4){#3}\fi%
+ \ifPst at transistorinvert\pnode(0.65,-0.4){#3}\else\pnode(0.65,-0.4){#2}\fi%
+ \ifx\psk at FETchanneltype\pst at FETchanneltype@P
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(0.15,0.0)(-0.35,0.0)%
+ \else
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(-0.35,0.0)(0.15,0.0)%
+ \fi
+ \else % IGBT, NPN or PNP
+ \ifx\psk at Ttype\pst at Ttype@IGBT\relax% IGBT
+ % IGBT Main drawings
+ \ifPst at transistorinvert
+ \pnode(0.65,0.5){#2}\pnode(0.65,-0.5){#3}
+ \pnode(0.15,-0.12){#3c}\pnode(0.15,0.12){#2c}
+ \else
+ \pnode(0.65,0.5){#3}\pnode(0.65,-0.5){#2}
+ \pnode(0.15,0.12){#3c}\pnode(0.15,-0.12){#2c}
+ \fi%
+ \psline[linewidth=\psk at I@width,arrows=-](0.15,0.6)(0.15,-0.6)
+ \psline[arrows=-,linewidth=\psk at I@width](TBaseNode|0,0.5)(TBaseNode|0,-0.5)%
+ \psline[arrows=-](#3)(#3c)%
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(#2c)(#2)%
+ \else % NPN or PNP
+ \ifPst at transistorinvert
+ \pnode(0.5,0.5){#2}\pnode(0.5,-0.5){#3}% E C
+ \else
+ \pnode(0.5,0.5){#3}\pnode(0.5,-0.5){#2}% C E
+ \fi
+ \ifx\psk at Ttype\pst at Ttype@NPN\relax% % NPN
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(TBaseNode)(#2)%
+ \psline[arrows=-,linewidth=4\pslinewidth](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \psline[arrows=-](0.5,0.5)(TBaseNode)(0.5,-0.5)%
+ \else% % PNP
+ \psline[arrowinset=0,arrowsize=8\pslinewidth]{->}(#3)(TBaseNode)%
+ \psline[arrows=-,linewidth=4\pslinewidth](TBaseNode|0,0.4)(TBaseNode|0,-0.4)%
+ \psline[arrows=-](0.5,0.5)(TBaseNode)(0.5,-0.5)%
+ \fi % NPN or PNP
+ \fi % IGBT
+ \fi % JFET
+ \fi %JFET, PNP or NPN
+ \fi % NMOS
+ \fi %FET
+ \fi % 180
}%
\ifPst at temp\else\endgroup\fi%
\ignorespaces%
More information about the tex-live-commits
mailing list.